LTC3104IMSE#TRPBF【PDF 11/20 页】IC REG DL BCK/LINEAR SYNC 16MSOP

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LTC3104

3104f

OPERATION

Slope Compensation

Current mode control requires the use of slope com-

pensation to prevent sub-harmonic oscillations in the

inductor current waveform at high duty cycle operation. In

some current mode ICs, current limiting is performed by

clamping the error amplifier voltage to a fixed maximum

which leads to a reduced output current capability at low

step-down ratios. Slope compensation is accomplished

on the LTC3104 internally through the addition of a com-

pensating ramp to the current sense signal. The current

limiting function is completed prior to the addition of the

compensation ramp and therefore achieves a peak inductor

current limit that is independent of duty cycle.

Short-Circuit Protection

When the output is shorted to ground, the error amplifier

will saturate high and the high side switch will turn on at

the start of each cycle and remain on until the current limit

trips. During this minimum on-time, the inductor current

will increase rapidly and will decrease very slowly during

the remainder of the period due to the very small reverse

voltage produced by a hard output short. To eliminate the

possibility of inductor current runaway in this situation, the

switching frequency is reduced to approximately 300kHz

when the voltage on FB falls below 0.3V.

BST Pin Function

The input switch driver operates from the voltage gener-

ated on the BST pin. An external capacitor between the SW

and BST pins and an internal synchronous PMOS boost

switch are used to generate a voltage that is higher than

the input voltage. When the synchronous rectifier is on

(SW is low) the internal boost switch connects one side

of the capacitor to V

replenishing its charge. When the

synchronous rectifier is turned off the input switch is turned

on forcing SW high and the BST pin is at a potential equal

to V

+ SW, relative to ground.

A comparator ensures there is sufficient voltage across

the boost capacitor to guarantee start-up after long sleep

periods or if starting up into a pre-biased output.

Undervoltage Lockout

The LTC3104 has an internal UVLO which disables the

converter if the supply voltage decreases below 2.1V (typi-

cal). The soft-start for the converter will be reset during

undervoltage lockout to provide a smooth restart once the

input voltage increases above the undervoltage lockout

threshold. The RUN pin can alternatively be configured as

a precise undervoltage lockout (UVLO) on the V

supply

with a resistive divider connected to the RUN pin.

LDO

OUTPUT

The V

LDO

output utilizes an internal PMOS pass device

that is guaranteed to support a 10mA load with a typi-

cal dropout voltage of 150mV. The LDO is powered by

the V

INLDO

input which can be tied to an independent

power source or to the V

OUT

of the step-down converter.

INLDO

can be tied to V

only if V

is guaranteed to be

within the absolute maximum ratings of the V

INLDO

pin.

The quiescent current will increase by about 0.3礎 when

INLDO

is tied to V

. The V

LDO

output is only active when

is greater than the UVLO threshold and the RUNLDO

pin is high but can be disabled independently by bringing

RUNLDO below 0.5V.

The LDO is specifically designed to be stable with a small

4.7礔 capacitor, but to also maintain stable operation with

arbitrarily large capacitance values without requiring a

series resistor. The LDO output is current-limit protected

to 20mA (typ). During an undervoltage or overtemperature

fault, the LDO is disabled until the fault condition clears.

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